Simulation
Monday 19
14:30 – 14:50 | Study of the 1D Scattering Mechanisms’ Impact on the Mobility in Si Nanowire Transistors
C. Medina-Bailón1, T. Sadi2, M. Nedjalkov3, J. Lee1, S. Berrada1, H. Carrillo-Nunez1, V. Georgiev1, S. Selberherr3, and A. Asenov1 1School of Engineering, University of Glasgow, Glasgow G12 8LT, Scotland, UK 2Department of Neuroscience and Biomedical Engineering, Aalto University, P.O. Box 12200, FI-00076 Aalto, Finland 3Institute for Microlectronics, TU-Vienna, Guẞhausstraẞe 27-29, E360 A-1040, Vienna, Austria |
14:50 – 15:10 | 3D Multi-Subband Ensemble Monte Carlo simulation of ‹100› and ‹110› Si nanowire FETs
L. Donetti, C. Sampedro, F.G. Ruiz, A. Godoy, F. Gamiz Departamento de Electrónica and CITIC, Universidad de Granada, Spain |
15:10 – 15:30 | Innovative Tunnel FETs architectures
C. Diaz Llorente1, S. Martinie1, S. Cristoloveanu2, J.P. Colinge1, C. Le Royer1, G. Ghibaudo2, J. Wan3, and M. Vinet1 1CEA, LETI, MINATEC Campus, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France 2IMEP-LAHC, INP-Grenoble, MINATEC campus, 38016 Grenoble, France 3Fudan University, Shanghai, China |
15:30 – 15:50 | TFET-based Inverter Performance in the Presence of Traps and Localized Strain
M. Visciarelli1, E. Gnani2, A. Gnudi2, S. Reggiani2, G. Baccarani2 1Dep. of Appl. Phys., School of Engineering Sciences, KTH Royal Institute of Technology, SE-16440 Kista, Sweden 2ARCES and DEI – University of Bologna, 40136 Bologna, Italy |