Simulation and Modelling
Wednesday 21
12:00 – 12:20 | Scaling FDSOI Technology down to 7 nm – a Physical Modeling Study Based on 3D Phase-Space Subband Boltzmann Transport
Z. Stanojevic1, O. Baumgartner1, F. Schanovsky1, G. Strof1, C. Kernstock1, M. Karner1, J.M. Gonzalez Medina2, F.G. Ruiz2, A. Godoy2, F. Gamiz2 1Global TCAD Solutions GmbH., Bösendorferstraße 1/12, 1010 Vienna, Austria 2Departamento de Electrónica y Tecnología de Computadores, Universidad de Granada, 18071 Granada, Spain |
12:20 – 12:40 | Design-oriented Modeling of 28 nm FDSOI CMOS Technology down to 4.2K for Quantum Computing
Arnout Beckers1, Farzan Jazaeri1, Heorhii Bohuslavskyi2, Louis Hutin2, Silvano De Franceschi2, and Christian Enz1 1Integrated Circuits Laboratory (ICLAB), Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland, 2CEA-Leti, Grenoble, France |
12:40 – 13:00 | Adaption of Triple Gate Junctionless MOSFETs Analytical Compact Model for Accurate Circuit Design in a Wide Temperature Range
Antonio Cerdeira1, Fernando Ávila-Herrera1, Magali Estrada1, Rodrigo T. Doria2 and Marcelo A. Pavanello2 1SEES, CINVESTAV, Mexico City, Mexico 2Electrical Engineering Department, Centro Universitário FEI, Sao Bernardo do Campo, Brazil |