Interfaces, Traps and Defects
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16:30 – 16:50 |
Characterization and Modeling of Drain Lag using a Modified RC Network in the ASM-HEMT Framework Mohammad Sajid Nazir1, Ahtisham Pampori1, Raghvendra Dangi1, Pragya Kushwaha2, Ekta Yadav2, Santanu Sinha2 and Yogesh Singh Chauhan1 1Department of Electrical Engineering, Indian Institute of Technology Kanpur (India) 2Micro Electronics Group, Space Applications Centre, Indian Space Research Organisation (India) |
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16:50 – 17:10 |
Efficient and accurate defect level modelling in monolayer MoS2 via GW+DFT with open boundary conditions Guido Gandus1,2, Youseung Lee1, Leonard Deuschle1, Daniele Passerone2 and Mathieu Luisier1 1Integrated Systems Laboratory, ETH Zürich (Switzerland) 2nanotech@surfaces, EMPA (Switzerland) |
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17:10 – 17:30 |
Prediction of the evolution of defects induced by the heated implantation process: Contribution of kinetic Monte Carlo in a multi-scale modeling framework P.L. Julliard1,2, A. Johnsson3, R. Demoulin2, R. Monflier2, A. Jay2, D. Rideau1, P. Pichler3, A. Hémeryck2 and F. Cristiano2 1STMicroelectronics (France) 2LAAS-CNRS, Université de Toulouse, CNRS (France) 3Fraunhofer Institute for Integrated Systems and Device Technology (IISB) (Germany) |
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17:30 – 17:50 |
Surface scattering impact on Si/TiSi2 contact resistance Kantawong Vuttivorakulchai, Mohammad Ali Pourghaderi, Yoon-Suk Kim, Uihui Kwon and Dae Sin Kim Computational Science and Engineering Team, Innovation Center, Device Solution Business, Samsung Electronics Co. (Republic of Korea) |